SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?


To: Dan3 who wrote (92873)2/13/2000 2:11:00 PM
From: Scumbria  Read Replies (1) | Respond to of 1574214
 
Dan,

I'm guess I'm still a bit confused, if a 128K 16-way and 2-way cache don't behave identically, why, after an extended period of repeated accesses to each region of memory, would they both be left with the same set of addressed in cache? (so that the there would be 100% duplication of the L1 in the L2)

Because the 16 way L2 is more efficient than the 2 way L1, all usefull addresses in the L1 will be guaranteed to also be in the L2. This is very inefficient and is the motivation for having a victim cache, which only stores addresses that have been cast out of the L1.

Scumbria