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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Scumbria who wrote (93359)	2/15/2000 6:08:00 PM
From: Jim McMannis	Read Replies (2) \| Respond to of 1571218

Scumbria, Seems to me that originally Intel said Willy would run SSE at about 1/2 the FPU, and the Integer at twice the FPU. The register reported that the Integer ran at 1.5Ghz and the FPU half of that so the SSE would be half of that. So the demo was SSE 375Mhz, FPU 750Mhz and the Integer is 1.5Mhz...? So was the demo today really just a 750Mhz chip? Or an average? Or really 1.5GHz? Jim

To: Scumbria who wrote (93359)	2/15/2000 11:50:00 PM
From: Paul Engel	Read Replies (1) \| Respond to of 1571218

SCUMbria - Re: "It would require an extremely deep pipeline and incredibly fast transistors. The cycle time would be 330 ps, which is about the delay for the fastest single latch I've seen. That would allow for zero logic per pipe stage!" Willamette was designed for GigaHertz. First silicon is running at 1.5/3.0 Ghz. Intel has plenty of head room ahead. The speed path optimizations have yet to begin. In its current incarnation, it is only an Aluminum/0.18 micron device. There is plenty of upside ahead in the upcoming Copper/0.13 micron process. You know the drill. Paul