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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: kash johal who wrote (93853)	2/17/2000 2:30:00 PM
From: Scumbria	Respond to of 1571198

Kash, Instruction 2 can only be issued 4 clocks after the first instruction on the Athlon, and 6 clocks after the Pentium IV. The larger number of clocks is intended to be offset by the shorter cycle time associated with a deeper pipeline. Scumbria

To: kash johal who wrote (93853)	2/17/2000 2:41:00 PM
From: tejek	Read Replies (2) \| Respond to of 1571198

Seems like a pretty evenhanded review. Overall Willy have some pretty neat items. Just may not be any better than AThlon on IPC. So will come down to a Mhz race. I don't recall who said: "the more things change the more they stay the same". Willamette Under The Microscope Kash, great post...De Gelas seems more confident in his interpretation of Willamette's specs than other writers have been. I have some questions that maybe you can answer: what does the fetcher do specifically if the Willamette is to debut at 1.3 G; at maturity where would you expect it to be vis-a-vis clock speed. the Athlon has a 10 stage pipeline; how difficult would it be to extend its pipeline to improve clock speed and would that require redesigning the entire chip to accommodate the longer pipeline. De Gelas seems to flip-flop on whether the T-bird will be a real competitor to the Willamette....what do you think? Thanks for your help. ted