SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?


To: Tenchusatsu who wrote (93955)2/17/2000 10:10:00 PM
From: Dan3  Read Replies (1) | Respond to of 1571785
 
Re: This will DEFINITELY not be a "sustainable streaming rate." ...

OOPS! Sorry, Tenchusatsu, you're right, it would burst 4.2, but stream 2.1 - as a best case.

That 3.2 for rambus is also a best case, though, right? And the DDR 266 will be VCM, which allows for more open pages and increases efficiency.

As for pricing - we'll just have to see what a package like that will cost. Complete motherboards, with power regulation, chipset, sockets, capacitors, 64bit data paths, ROM, clock, etc., etc, sell for as little as $70 at retail. I'm a bit skeptical about your estimate that adding a second memory channel to a board will increase costs by $120 to $160 over a single memory channel board.

Regards,

Dan



To: Tenchusatsu who wrote (93955)2/17/2000 10:22:00 PM
From: Dan3  Read Replies (2) | Respond to of 1571785
 
Re: Asked why Intel didn't create a Timna with an SDRAM interface on the processor, MacWilliams said that such an approach would have required too many pins...

We had some of these discussions last August when Rambus was going to be 10% of the market by Christmas and approaching 20% around now. So far, at least, Rambus hasn't been working out as planned (except, I must admit, for those holding stock this last week - what the heck happened?)

Somebody recently, was it Samsung? Described a new rambus layout with all of the i/o and control in the center of the die so that the data paths, while still painfully wide, were at least shorter. They expect to reduce the die size penalty so that it may be no more than 10% (at least on current generation chips - start putting more capacity on a chip and the path lengths get longer again and go back to taking up a greater percentage of the die).

But it sounds like number of process layers, packaging, testing, and tolerances will still be a disadvantage for Rambus at any given fabrication generation.

But we'll see - even at a 100% price premium, $20 compared to $10 wouldn't be a problem for Timna, as long as they can really get prices that low.

Dan