SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Scumbria who wrote (94609)2/22/2000 3:04:00 PM
From: kash johal  Read Replies (3) | Respond to of 1572172
 
Scumbria,

re:"L2 cache would be shared"

Why is that?

Is there no gain in having 2 completely seperate cores on chip.

Might it not obviate the need for software support as win2K already supports dual cpu's?

If its a dumb question just say so.

regards,

Kash



To: Scumbria who wrote (94609)2/22/2000 3:05:00 PM
From: Epinephrine  Read Replies (1) | Respond to of 1572172
 
RE <Dual cores would be smaller than two single cores, because they would share the L2 cache.>

Scumbria,

Forgive me, I should probably know this it must have been discussed previously, but what percentage of die size will the Athlon L2 cache be approximately (On the single core design)

Thanks,

Epinephrine


HomeMailHotSubjectMarksPeopleMarksKeepersSettings
Terms Of UseContact UsCopyright/IP PolicyPrivacy PolicyAbout UsFAQAdvertise on SI
© 2025 Knight Sac Media.  Data provided by Twelve Data, Alpha Vantage, and CityFALCON News