Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Micron Only Forum -- Ignore unavailable to you. Want to Upgrade?

To: TREND1 who wrote (50668)	3/7/2000 4:27:00 PM
From: DJBEINO	Read Replies (1) \| Respond to of 53903

Advanced DRAM alliance works on specs for release later this year By Jack Robertson Semiconductor Business News (03/07/00, 11:14:38 AM EDT) PHOENIX --Attendees at a semiconductor forecasting conference here got a peak at a memory architecture being pursued by the recently formed Advanced DRAM Technology (ADT) alliance. A Micron Technology Inc. executive disclosed a channel-based, narrow interface for high-bandwidth DRAMs during a session at the Semico Summit Conference on Monday. According to Dean Klein, Micron's vice president of integrated products, the ADT alliance is now in preliminary design discussions for proposed specifications on next-generation DRAMs. He said the group expects the first broad standard on design specs "to be available at the public level sometime this year." The next-generation DRAM alliance includes the world's five biggest DRAM makers and Intel Corp., which are working on a successor to existing memory architectures for systems in the middle of this decade (see Jan. 17 story). In addition to Intel, the DRAM alliance includes Hyundai, Infineon, Micron, NEC, and Samsung. In fielding questions at the Semico Summit Conference, Micron's Klein said he expected the chip would be "channel based with a high bandwidth and low latency." He added that "one of the most significant parameters affecting performance is latency." Later in an interview, Klein said the present Direct Rambus DRAM architecture--although well suited for many applications--has high latency affecting performance in other systems. Latency is the time it takes for the processor to access memory for the first time before a data flow from DRAM is maintained. However, Klein quickly added that "it is a myth that Micron doesn't support Rambus," referring to the format promoted by Rambus Inc. of Mountain View, Calif. "We will have [Rambus] silicon shortly and hope to quickly validate our chip," Klein said. "Micron is 'agnostic' about the different DRAM architectures. We will build whatever memory type is dominant. We just want memory to be dominant. Keith McDonald, president of Smart Modular Technologies Inc., said Direct Rambus has a major advantage in "granularity" concerns of memory expansion. Because of Direct RDRAM's narrow 16-megabyte bandwidth, users can expand memory in 16-Mbyte increments, rather than 32- to 64-Mbyte steps needed for conventional SDRAM memory. He said the granularity benefit will spur Direct RDRAM use in electronic game consoles, such as the Sony PlayStation II, and in new sub-$500 PCs and low-cost personal Internet information appliances. But Micron's Klein suggested that low-cost portable systems could use embedded SDRAM memory on logic chips to avoid the granularity issue as well as get high performance and low cost. He asked why such portable devices would use 64-Mbyte memory size that is increasingly becoming the standard for memory modules, when all they need is 4-Mbytes that can easily be embedded on the logic chip semibiznews.com