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To: Don Green who wrote (37886)	3/9/2000 11:48:00 PM
From: Jdaasoc	Read Replies (1) \| Respond to of 93625

Don: DDR update. techweb.com March 06, 2000, Issue: 1201 Section: News -------------------------------------------------------------------------------- Semi manufacturers to develop fast DDR SDRAM standard Jack Robertson In the latest volley over next-generation DRAM performance, memory-chip makers this week will meet to begin designing a so-called PC3200 double-data-rate device that will compete head-on with the latest Direct Rambus architecture. The DDR SDRAM interface will incorporate BGA packaging to reduce leads and match the data bandwidth of the dual-channel Direct Rambus DRAM that Intel Corp. unveiled at last month's Intel Developer Forum. The Rambus chips are designed to support Intel's upcoming Willamette microprocessor. Desi Rhoden, chairman of JEDEC, said the committee will meet this week to begin hammering out a PC3200 industry standard. When placed in a DIMM, the faster DDR SDRAM is purported to offer a 3.2-Gbyte/s bandwidth, the same rate achieved by dual-channel Direct RDRAM shipping in a RIMM module. If a PC3200 standard is ratified by the end of the year, the first modules to incorporate the new chip could come to market in 2001, Rhoden said. He referred to PC3200 as "a kind of DDR-1.5" that will offer higher interim performance until the next-generation DDR-2 specification comes to market in 2003. A survey of DRAM makers showed that most are holding their PC3200 plans close to the vest until the JEDEC standard is approved. Executives at Micron Technology Inc. and Samsung Electronics Co. Ltd. said the companies have heard about a BGA package for DDR SDRAM, but declined to comment. Part of the performance boost Direct RDRAM offers is derived from the use of a microBGA package DRAM makers have licensed from Tessera Inc., San Jose. But Rhoden said the BGA package for upcoming PC3200 DDR devices "would be far less costly than Direct Rambus' microBGA." He added that DRAM companies are working on BGA-packaging approaches for PC3200 chips, but Rhoden wouldn't elaborate. Underscoring the looming competition between the two devices, Tessera last week introduced a manufacturing process that it claims will cut microBGA assembly costs by 50%. The lower-cost process, known as Zinger 4.0, can be applied to any number of devices that use a microBGA package, including Direct RDRAM, flash memory, and SRAM, said David Light, Tessera's R&D director. Light contends that once the DDR memory moves to a chip-scale package, similar production equipment could be used to assemble SDRAM and Direct Rambus ICs. "This could be a big cost savings for memory companies," he said. "It could also help Direct Rambus, since an investment in new BGA-packaging equipment could be spread over both DDR and Direct Rambus chips." Rhoden, however, disagreed, claiming that PC3200 chips will require different and less-expensive BGA-packaging equipment. When it debuts, PC3200 SDRAM is expected to enable Advanced Micro Devices Inc.'s Athlon processors to match the 3.2-Gbyte/s data rates of the upcoming Intel Willamette MPUs. In the meantime, the first DDR Athlons using PC2100 modules are slated to debut midyear, with a 2.1-Gbyte/s data rate twice that of the PC133 SDRAMs used by Intel's Pentium IIIs. Intel could recover the data-rate lead with Willamette, slated to go into production early next year. However, Rhoden said Athlon-based PCs could also use a dual-channel PC2100 memory configuration capable of an even higher 4.2-Gbyte/s data rate. When PC3200 becomes available, dual-channel DDR-enabled desktops and workstations could have a bandwidth as high as 6.4 Gbytes/s, he added.