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Technology Stocks : TSI TelSys Corporation - Satellite communications -- Ignore unavailable to you. Want to Upgrade?

To: MF who wrote (235)	3/13/2000 1:13:00 PM
From: MF	Respond to of 241

TSI's LavaLogic receives synthesis product results TSI TelSys Corp TSI Shares issued 9,754,200 Mar 10 close $0.95 Mon 13 Mar 2000 News Release Mr. Jay Pisula reports LavaLogic, a business unit of TSI TelSys Corporation, is shipping its first product, Forge, a system-level electronic design compiler, and the results of its benchmarking activities. Forge improves productivity by allowing designers to work at higher levels of abstraction and thus addresses the growing design productivity gap. Forge is an advanced compiler that improves productivity by allowing designers to write system descriptions using standard programming languages, such as C, C++ and the Java programming language. Forge automatically compiles these descriptions into efficient hardware descriptions (RTL Verilog) compatible with popular design environments such as those from Cadence, Mentor and Synopsys. Results -- improving design productivity Recent benchmarking activities involving a Sun Microsystems' picoJava Floating Point Unit (FPU) have demonstrated productivity improvements of 10 times, while maintaining identical clock cycle performance. The Java programming language specification of the FPU was compiled into RTL Verilog using Forge. Both the automatically generated Verilog code from Forge and Sun's hand-coded Verilog were then run through Synopsys's design compiler to perform logic synthesis using identical synthesis scripts. The resulting hardware implementation demonstrated area metrics that were 11 per cent less than a hand-coded implementation and timing metrics that were within 15 per cent. Don Davis, director of engineering, noted: "We address the EDA industry's biggest headache -- productivity. The Forge compiler allows designers to go quickly and directly from software to Verilog." Productivity improvements were the result of designing the FPU in the Java programming language, which provides a higher level of design abstraction than Verilog, coupled with significantly faster functional verification. For example, the picoJava FPU took nine man-months using current methodologies and just under four weeks using Forge. Functional verification took three minutes for the Java programming language description versus 33 hours for a cycle-accurate Verilog simulator. The FPU contains 20,079 lines of Verilog code. With the Java programming language, the same functionality is described in only 3,487 lines of code. Forge advantages Forge technology provides not just the ability to generate synthesizable RTL code from a high-level software language, but it also provides the opportunity to explore a new way of thinking about hardware design by leveraging the full power of modern software languages. Forge uses proprietary architectural synthesis technology for generation of fast, parallel efficient system architectures. An open-system front end allows Forge to accept descriptions written in C, C++ and the Java programming language. Compile times are short and software functional simulation is 100 to 1,000 times faster than Verilog RTL simulation. These times are a few minutes compared with hours or a few days with a conventional Verilog simulator. Industry support for Forge "Sun Microsystems has seen a growing number of vendors in EDA adopting Java technology for development of user interfaces," said Kelly Perey, director of technical market development at Sun Microsystems, Inc. "LavaLogic represents a new generation of EDA vendor who has seen the benefits of Java for building new EDA applications. Sun applauds LavaLogic's innovation in this area." Price and availability The Forge design compiler is available now for $100,000 (U.S.). Forge has been shipping to beta sites since last year. Production shipments begin in June. To register for a beta copy visit www.lavalogic.com. Forge runs on the Sun Solaris platform. NT and Linux versions are planned and will be announced later this year. LavaLogic was founded in April, 1997, and is financed by and is a business unit of TSI TelSys Corporation. Contracts with the Defense Advanced Research Projects Agency (DARPA) partially finance research and development. In May, 1999, LavaLogic announced its intent to address design productivity with architectural synthesis. Contact LavaLogic at 7100 Columbia Gateway Dr., Columbia, Md., 21046, phone 410-872-3900, fax 410-872-3902, info@lavalogic.com. WARNING: The company relies on litigation protection for "forward-looking" statements.

To: MF who wrote (235)	3/13/2000 1:37:00 PM
From: Ron Struthers	Read Replies (1) \| Respond to of 241

MF, I don't think this is of any concern. The case is about a year old now and has no connection to the Abra Group or TSI, other than the fact that Wan Muhamad Hasni was an executive/chairman of one Abra Group Int. companies, Abra Group Asset Managers, he resigned once the allegations arose. As stated in the news it is believed the allegations were committed while Hasni was at Abra Group Int's office The court case is against Hasni, not the Abra Group Int. and has no bearing on Abra or TSI. Hasni is not proven guilty yet and I have heard he had political connections and this allegation against him may be politically motivated. Also I have learned about the word 'scheme' , it does not sound good but 'scheme' in Malayasia is another way of saying financial plan. I do not have any concern over this and I see no bearing on TSI Ron