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To: kinkblot who wrote (1136)3/27/2000 1:23:00 PM
From: HowardRoarke  Respond to of 1820
 
Nice to see a mention at end of gilder article, expect he has some reason to make the judgement for Conexant.....
(KOPN largest customer for custom HBT wafers)

"Looking ahead, I will be focusing increasingly on low-power technologies, whether silicon germanium microchips from Atmel and AMCC, mixed signal chips from National Semiconductor, Texas Instruments and Analog Devices, or the low-power phones that made Qualcomm the leading stock of 1999 and will make it a spearhead communications company for the millennium. The critical analog function of a CDMA wireless phone, for instance, is the management of extremely low-power signals to keep multiple-shared-frequency transmissions from drowning each other out. The leading manufacturer of the power amps that do this job is Conexant, a reminder to investors that there are other CDMA plays available for those experiencing vertigo on the Qualcomm heights."

forbes.com



To: kinkblot who wrote (1136)4/10/2000 11:11:00 AM
From: kinkblot  Read Replies (1) | Respond to of 1820
 
SiGen Marches Forward

electronicnews.com

SiGen's NanoCleave process is a proprietary, implantation technology that it uses to cleave or separate the donor wafer from the device wafer along a plane that follows the atomic structure of the silicon. The company maintains that this results in a surface roughness that ranges between 4 and 8 Angstroms - less than 1 nanometer, according to SiGen. It is a significant step above typical hydrogen-induced thermal cleaving, which leaves a roughness of about 80 Angstroms, and in turn requires some sort of polishing or chemical etching.

Separation is achieved by controlling stress energy at the cleave front rather than by thermal means. As described in several of SiGen's US patents, cleaving is initiated by providing additional energy, for example in the form of a pressurized fluid. The entire process can be carried out at a relatively low temperature, room temperature in the case of their Genesis Process™. This eliminates detrimental thermal effects and avoids annealing of stress in the implanted region. The energy required for propagation of the front is preferentially reduced in the fracture plane due to this stress.

However, for applications such as microdisplays, where transfer is not to a second silicon wafer, it is desirable that the circuits be formed before lift-off from the donor wafer. An advantage of this approach is compatibility with standard (including high temp) IC fabrication processes. This is possible with the improved SOITEC process (US6020252) that uses mechanical force for separation. Transferring to a quartz substrate to enable high temperature processing after lift-off is not the same thing. In SiGen's patent,

U.S. Patent #5,985,742 issued 11/16/99 to Henley and Cheung,
Controlled cleavage process and device for patterned films
patents.ibm.com

they claim that implantation can be done through the devices, e.g. a "memory integrated circuit" as specified in Claim 22, to define the fracture plane:

Depending upon the application, smaller mass particles are generally selected to reduce a possibility of damage to the material region, which may include devices thereon. That is, smaller mass particles easily travel through the substrate material including devices to the selected depth without substantially damaging the material region (and devices) that the particles traversed through.

The Berkeley patent mentioned in the Electronic News article (US6027988), covers use of a particular implantation technique, plasma immersion ion implantation ("PIII"), which is claimed to have significant cost advantages over conventional beam line ion implantation.

sigen.com - Silicon Genesis Corporation

WT