More Patent Info:United States Patent 6,040,622
Wallace Mar. 21, 2000
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Semiconductor package using terminals formed on a conductive layer of a circuit board
Abstract
A small package is provided for a flash EEPROM memory. The small package uses terminals which are part of a bottom conductive layer of a circuit board. In this manner, the final package can be quite thin. The circuit board can be connected to the integrated circuits and passive devices and can be encapsulated in plastic or glued to a plastic cover. In this manner, a thin and relatively inexpensive package can be formed. Additionally, the circuit board can have testing connections which can be removed before forming the final package.
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Inventors: Wallace; Robert F. (Sunnyvale, CA).
Assignee: SanDisk Corporation (Sunnyvale, CA).
Appl. No.: 96,140
Filed: Jun. 11, 1998
Intl. Cl. : H01L 23/02
Current U.S. Cl.: 257/679; 257/687; 257/723
Field of Search: 257/679, 687, 685, 723, 767, 773, 787
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References Cited | [Referenced By]
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U.S. Patent Documents
5,307,240 Apr., 1994 McMahon
5,315,241 May, 1994 Ewers
5,493,151 Feb., 1996 Asada et al.
5,663,901 Sept., 1997 Wallace et al.
5,796,164 Aug., 1998 McGraw et al. 257/679
Primary Examiner: Whitehead, Jr.; Carl
Assistant Examiner: Potter; Roy
Attorney, Agent or Firm: Majestic, Parsons, Siebert & Hsue
26 Claims, 16 Drawing Figures
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Claims
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What is claimed is:
1. A package including:
a circuit board;
an set of circuit elements on the circuit board, the set of circuit elements including at least one integrated circuit and passive components; and
packaging material surrounding the set of circuit elements and part of the circuit board,
wherein one side of the circuit board includes a set of terminals that are visible from the side of the package, the set of terminals being positioned away from the edge of the circuit board, and
wherein the package is a flash EEPROM package.
2. The package of claim 1, wherein the packaging material includes molded plastic.
3. The package of claim 2, wherein the packaging material includes a bordering frame.
4. The package of claim 3, wherein the bordering frame is made of plastic material.
5. The package of claim 1, wherein one side of the circuit board is exposed.
6. The package of claim 5, wherein the exposed side of the circuit board material includes the set of terminals connected to the remainder of the circuit board by vias.
7. The package of claim 6, wherein the circuit board material is attached to the packaging material by epoxy.
8. The package of claim 1, wherein the circuit elements includes at least two integrated circuits and passive devices.
9. The package of claim 8, wherein the thickness of the package is less than 12 mils.
10. A package including:
a circuit board;
at least one integrated circuit on the circuit board; and
packaging material surrounding the set of circuit elements and part of the circuit board,
wherein one side of the circuit board is exposed, the exposed side of the circuit board including a set of terminals connected to the remainder of the circuit board by vias; and
wherein the package is a flash EEPROM package.
11. The package of claim 10, wherein the circuit board material is attached to the packaging material by epoxy.
12. The package of claim 10, wherein on the exposed side of the circuit board only the set of terminals is exposed.
13. The package of claim 10, wherein the circuit elements includes at least two integrated circuits and passive devices.
14. The package of claim 10, wherein the thickness of the package is less than 12 mils.
15. A package including:
a circuit board;
a set of circuit elements on the circuit board, the set of circuit elements including at least one integrated circuit and passive components; and
a plastic material encasing the set of circuit elements and part of the circuit board,
wherein one side of the circuit board includes a set of terminals that are accessible from the side of the package, the set of terminals being positioned away from the edge of the circuit board; and
wherein the package is a flash EEPROM package.
16. The package of claim 15, wherein one side of the circuit board is exposed.
17. The package of claim 16, wherein the exposed side of the circuit board material includes the set of terminals connected to the remainder of the circuit by vias.
18. The package of claim 15, wherein the circuit board material is attached to the packaging material by epoxy.
19. The package of claim 15, wherein on the exposed side of the circuit board only the set of terminals is exposed.
20. The package of claim 15, wherein the thickness of the package is less than 12 mils.
21. A completed non-volatile memory package for use with a host device, comprising:
a circuit board;
at least one IC attached to the circuit board, including an array of flash EEPROM cells;
terminals which are included in a side of the circuit board and positioned away from an edge of the circuit board; and
packaging material surrounding the at least one IC, and part of the circuit board, but not the terminals, whereby the terminals are exposed in the completed package.
22. The package of claim 21, wherein a size of the non-volatile memory package is 11/4 inches long by 7/8 of an inch wide.
23. The package of claim 22, wherein a thickness of the non-volatile memory package is less than 12 mils.
24. A completed non-volatile memory package for use with a host device, comprising:
a circuit board having a first side and a second side;
a row of terminals provided on the first side of the circuit board;
an IC electrically connected with the terminals, the IC being provided on the second side of the circuit board; and
packaging material encapsulating the IC and part of the second side of the circuit board,
wherein the IC includes an array of flash EEPROM cells.
25. The package of claim 24, wherein a size of the non-volatile memory package is 11/4 inches long by 7/8 of an inch wide.
26. The package of claim 25, wherein a thickness of the non-volatile memory package is less than 12 mils.
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