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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Joe NYC who wrote (101331)	3/31/2000 4:42:00 PM
From: Scumbria	Respond to of 1573092

Joe, Thanks for explanation of the victim cache. I don't think I understand it yet, but I am sure there will be more info on it if AMD uses it. Is Coppermine L2 a victim cache? The Coppermine cache allocates an L1 and L2 line whenever a cache miss goes to DRAM. This means that all L1 addresses are duplicated in the L2, which is inefficient. Remember though that the L1 cache on Coppermine is small so the duplication is minimal. Athlon has a large L1, which means that the only practical type of L2 cache is a victim cache (to minimize duplication.) Instead of allocating a line on a miss, the Athlon L2 cache allocates a line for data pushed out of the L1 because of overflow. The L2 behaves as a fast repository for excess data from the L1. I guess it makes sense, but wouldn't the main memory be overloaded with requests constantly, even though it may turn out that the access was not really needed, because the data was in L2? Yes. That is why DRAM accesses are normally deferred until after the L2 lookup. Scumbria