Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Rambus (RMBS) - Eagle or Penguin -- Ignore unavailable to you. Want to Upgrade?

To: Bilow who wrote (39147)	4/3/2000 2:13:00 AM
From: richard surckla	Respond to of 93625

Bilow... *... though the cause of the problem has not been announced.* How can a $2.80 per trade guy make such a post? At least your $2.80 trade system was based on fact, but now you are making unannounced assumptions! If I were you I would stick to your $2.80 trade system! ROTFLMAO & PMP!!!!

To: Bilow who wrote (39147)	4/3/2000 2:23:00 AM
From: Dave B	Respond to of 93625

Carl, One is not going to find a reputable source for the cause of a secret problem at Intel. Okay. So your statement was simply your opinion with nothing credible whatsoever to back it up. It appears that not even The Register or Tom have published anything to support your hyperbole. Just wanted to make sure. Dave p.s. It's also slightly ridiculous to make a statement like "but RDRAM has a history of bit failures" when it's only been shipping for 2-3 months.

To: Bilow who wrote (39147)	4/3/2000 5:26:00 AM
From: John Walliker	Read Replies (2) \| Respond to of 93625

Carl, One of the things I should note is that RDRAM is generally available in ECC form, while SDRAM is generally not. This is a place that the memory industry has visited before, alpha radiation used to cause bit errors in all DRAM, and engineers included ECC. (The problem was solved by switching materials in the package, if my memory serves correctly.) ECC is expensive, it increases memory costs by something like 10%. That is more than the profit margins of a lot of companies, to a design engineer, 10% is a hell of a lot. Engineers only include ECC for very good reasons, and the only good reason is that the memory technology needs it. SDRAM doesn't need it, RDRAM does. This essentially proves that RDRAM (as used in PCs) drops bits. Do you really expect us to believe that because "RDRAM is generally available in ECC form" this "essentially proves" that it is inherently less reliable than SDRAM? In one of your posts last year you pointed out that many single bit errors will go unnoticed and do no harm. However, such errors may insidiously modify data or programs if non parity/ecc memory is used. Most people blame system crashes on flakey software, but that is not the only explanation. This is why I think that ALL memory should be ecc protected in systems that matter to a business. How do you know that you are not getting occasional single-bit errors right now from your SDRAM? It is certainly true that improved packaging has improved reliability enormously, but there is nothing that we can do to avoid cosmic radiation. John