SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?


To: Scumbria who wrote (102765)4/7/2000 12:30:00 AM
From: Charles R  Respond to of 1575621
 
Scumbria,

<later on this year, that technology will be migrated to a 0.13 process.>

My understanding is this is more like 0.15 but nevertheless, I am not complaining. I continue to feel pretty comfortable with AMD keeping up with Wilamette until the end of 2000.

Chuck



To: Scumbria who wrote (102765)4/7/2000 1:10:00 AM
From: Joe NYC  Read Replies (3) | Respond to of 1575621
 
Scumbria,

Here is the EET story:
eetimes.com
The Thunderbird chip, which is will be produced at the company's Fab 30 in Dresden, Germany, is based on a 0.18-micron, six-layer metal copper manufacturing process. The process was frozen last winter and later qualified at the end of last quarter.

Wafer yields are high and stable for both Athlon processors and 4-Mbit SRAM chips based on the new process.


Here is what Register said:
According to the reports, AMD managed to produce stable versions of both synchronous memory and microprocessors only a week or so ago. Thunderbird will include cache on die, with chips expected to be available as early as June.

I think EET article sounds more optimistic, and seems better researched.

BTW, what is AMD doing with SRAM? (which incidentally I thought stood for Static RAM rather than Synchronous). I thought than once L2 was integrated on the die, there would be no need for it. Do they use it as some kind of test of the new process?

Joe