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Technology Stocks : Rambus (RMBS) - Eagle or Penguin -- Ignore unavailable to you. Want to Upgrade?

To: John Walliker who wrote (39768)	4/13/2000 5:48:00 AM
From: Bilow	Respond to of 93625

Hi John Walliker; Actually, in addition to doing the comparison using chips from the same company, you also want to make sure that the comparison is between chips of the same vintage design, more or less. Maybe a good comparison would be the x32 DDR chips that Nvidia's chipset connects up to, versus, the latest production run RDRAM. I'd do it but I couldn't easily locate the Idd specs on the latest RDRAM. They appear to have changed, at Samsung. In addition, the previous version seems to have been converted to a sample only mode. That includes all the 64Mb, and the first generation 128Mb. I am too tired to look around, (in fact, this post is probably rife with errors). If you locate a data sheet for the new RDRAMs, could you post a link? I ended up using the one on the Rambus website, but I don't see how Rambus can specify meaningful current requirements when their customers all have different processes. By the way, the Jedec spec for DDR has a code in the current specs that says vendor dependent, or something like that. I would have expected that Rambus would have the same. Otherwise they may have just given a maximum value, and that would be needlessly conservative for our purposes. I should perhaps have stressed that the above calculations included no I/O power, they were just Idd. There is another issue, one which determines power consumption of SDRAM to an amazing degree, and that is how the banks are organized. Example. Suppose, for a given memory chip density, we need to use 16 chips. If we get the x4s, then each data line only goes to one chip. Thus every chip has to be accessed every time, and the power consumption is relatively high. But if we used x16s, we would end up with four chips on each data line, and an access would only touch four chips. You wouldn't think the above topological difference would be a big deal in system power consumption, but the effect is huge. The x16 system uses a lot less power. (Compare the current requirements of a x16 chip to a x4 chip of the same total bit count. Pretty much the same, no?) But the x4 system has 4x longer rows, and, consequently, is slightly less likely to have a row miss, and is therefore a wee bit faster. The choice is all a matter of what the design engineer is trying to trade off. -- Carl