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Technology Stocks : Rambus (RMBS) - Eagle or Penguin -- Ignore unavailable to you. Want to Upgrade?


To: jim kelley who wrote (39893)4/14/2000 10:57:00 AM
From: Scumbria  Respond to of 93625
 
Jim,

Argue with this whitepaper...you have been peddling nonsense. It will be noted on your next review.

I will review your "unbiased" paper on DRAM latency (from a DRDRAM manufacturer), though it appears that the author has chosen an SDRAM with very long CAS latency.

Regardless, you are missing my point. Given that the core memory technology is the same on all DRAM types, the latency does not vary much from type to type. Latency (not bandwidth) is the primary consideration for CPU performance.

It therefore makes no sense for a desktop computer manufacturer to pay a large price premium for a high bandwidth memory. That is Intel's big mistake with DRDRAM.

Scumbria



To: jim kelley who wrote (39893)4/14/2000 11:20:00 AM
From: Ali Chen  Respond to of 93625
 
jim kelley, <From Samsung:
usa.samsungsemi.com
Argue with this whitepaper...you have been peddling nonsense. It will be noted on your next review. <G>>

If you have no clue, do not talk. The article
tries to deceive you and alike.

First, they are talking about a single RDRAM
chip. In a real system the chips are programmed
with additional delays to compensate for
propagation time to the farthest device,
or typically additional with 5-6.25 ns,
read Paul DeMone clear explanations as why.
BTW, this programmability is exactly the
important patened feature the Rambus is so
praud of.

Second, I am not aware of SDRAMs suffering
"from what is known as the two-cycle
addressing problem."
Look at the God-written document,
ftp://download.intel.com/design/chipsets/memory/pc133sdram/spec/sdram133.pdf

and you will find no requirements for two-cycle
RAS. Actually, if you want to compensate for heavy
load and weak drivers, you always have extra two
full clocks of precharge time to drive address
lines ahead of the RAS strobe, or exactly how
it is done in Intel chips. Therefore the actual
timing requirements are fairly relaxing in the
reality, and that's why it works in contrast with
unthinkably and unreasonably squeezed Rambus
interface.

Third, they compare best case RDRAMs with PC100 Cas2
and PC133 Cas-3 memory. Today there is plenty of
SDRAMS at 133 and 143MHz with true 2-2-2 timing.

Looks like Samgung wants to sell the slow-going
product and wants to grease sales with blatant
marketing.

Have nice trading,
- Ali



To: jim kelley who wrote (39893)4/14/2000 3:59:00 PM
From: Bilow  Read Replies (1) | Respond to of 93625
 
Re that Samsung white paper from so long ago...

I believe that the article is the same one that we hashed over this past summer. I couldn't quickly find a date on it, but I think it is at least a year old, and is from when the company had a big lead in RDRAM, and was flogging the technology hard. Since then, Samsung has made an about face, and is pushing DDR hard. In addition, the article was wrong then, and is still wrong, as has been noted already on this thread. They were performing the ancient and revered technique of comparing the latest technology with something obsolete. I don't feel like going over the rest of the errors right now.

By the way, the same page has the following, somewhat humorous comments in light of what was to happen to Camino a few months later:

The Resurgence of Rambus DRAM
Electronic News, 4/5/99

...
Can they really supply PC133 desktop chipsets, which would rival Camino's performance, in volume?
...
The Rambus delay that received so much publicity and negative comments is surprisingly beneficial for the DRAM industry.
usa.samsungsemi.com

More recent articles on the same page include this support of DDR SGRAM. And you thought that RDRAM still stood some sort of a chance of picking up graphics wins? They don't even bother to compare DDR to RDRAM, RDRAM is quite dead, design engineers are not seriously considering it for new products.

c) It assures boost in performance with a little premium over the SDRAM.
DDR SGRAM can fully utilize existing SDRAM capacity and infrastructure, i.e., existing process, packaging, and testing, and does not require additional capital investment by the memory vendor. This advantage enables a low-price premium for DDR SGRAM relative to the SDR SDRAM.

d) It answers the advance of memory technology.
The continuous improvement in DDR SGRAM technology gives longevity to the system design with multiple generations (higher density and advanced die shrink) and ultra high-speed operation (DDR-II, more bandwidth).

e) It is the preferred graphics industry standard.
Many top-tier DRAM manufacturers have developed DDR SGRAMs, assuring the customer of multiple sources and a competitive price. In addition, the top 5 graphics controller manufacturers plan to offer DDR SGRAM products in volume by the end of 1999. Most importantly, DDR memory technology is an open specification and it is already a JEDEC standard

usa.samsungsemi.com

-- Carl

P.S. RMBS looks to me to be possibly bottoming. This could be a great time to load up on the shares big time!!! Just don't get greedy, over the long run, the technology is dead, dead, dead, and the long run will be evident to most people over the summer.



To: jim kelley who wrote (39893)4/15/2000 3:10:00 AM
From: Scumbria  Read Replies (1) | Respond to of 93625
 
Jim,

Argue with this whitepaper

I reviewed the whitepaper and compared against the Micron PC133 specs.

micron.com

The whitepaper author used CAS latency 3 SDRAM for the comparison, and came up with DRDRAM component latency of 38.75ns, and PC133 component latency of 45ns.

All Micron SDRAM runs at 133MHz with CAS latency 2, which gives a component latency of 37.5ns, slightly faster than the DRDRAM.

Scumbria