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Technology Stocks : Rambus (RMBS) - Eagle or Penguin -- Ignore unavailable to you. Want to Upgrade?

To: Scumbria who wrote (40073)	4/19/2000 8:52:00 PM
From: jim kelley	Read Replies (2) \| Respond to of 93625

Scumbria, The article is ok as far as it goes. It is nevertheless hardly definitive and its discussion of DRAM latency and its causes is wholly missing. It does not discuss the following latency issues: 1)read/write turnaround latency 2)Average latency for a cache fill from RDRAM 3)The latency relationship between the L1, L2 caches and the RDRAM. 4)The "dead time" effect of refresh cycles on the DRAM and RDRAM. Under what conditions does memory saturation take place. 5) It fails to compare a memory system to RDRAM. Instead it asserts that the SDRAM bandwidth will be adequate and that its latency will be better but it does not display a design for a SDRAM memory system to which RDRAM can be compared. 6) The Front Side Bus bandwidth also plays a factor in the performance of the DRAM and RDRAM systems. It is not discussed. I could go on but I think you get the point. His conclusions are not based on a complete exposition of the facts. He has not stated sufficient facts to support his conclusions. In short, the article is a mix of partial facts , incomplete analysis and the authors own biases. JK