To: minnow68 who wrote (106201 ) 4/17/2000 1:29:00 AM From: kapkan4u Read Replies (3) | Respond to of 1573943
<Personally, I'd give Willy about a 75% chance of eventually beating Athlon/Mustang in Mhz.> Read Paul Demone's article. His discussion about the Willamette trace cache and ALUs makes a lot of sense.aceshardware.com Willamette architecture appears to be poorly balanced. The uops density in the trace cache is 5 times worse than the corresponding x86 instructions. In effect, Willamette has an equivalent of a tiny ~16k L1 instruction cache, albeit a fast one. Programs with poor locality will run slow, while Willamette's single decoder is straining to fill the trace cache after trace cache faults. Ironically, programs that exhibit good locality tend to be scientific floating-point codes. These programs will run afoul of Willamette's single-issue floating-point unit. Even the SSE-2 double precision scalar arithmetic, which compilers can generate, will under-perform, because only one scalar double-precision instruction can be issued in every clock. And don't expect C compilers generate packed double-precision SSE-2 instructions on anything other than trivial loops that seldom happen in real programs. ALUs transistors running at twice the clock speed generate twice as much heat as well. The power has to be delivered and dissipated through the surrounding silicon. This sounds like a severe MHz scalability hurdle. To get an idea about Willamette's performance watch for two things. First, if performance was good, SPEC numbers would have been leaked already. Second, watch Dell. They have the earliest access to Willamette samples. If Dell goes with T-bird and Spitfire, then Intel stockholders watch-out. The bottom will be very hard to find. Kap