To: Joe NYC who wrote (40705 ) 4/25/2000 1:05:00 PM From: Tenchusatsu Respond to of 93625
Jozef, <This still leaves me confused (as I posted earlier) why Intel would prefer DDR to Rambus in the server area, where bandwidth is very important.> 1) DDR will cost less than RDRAM per megabyte. Even a 20% savings can translate into a lot since servers typically require gigabytes of memory. 2) RDRAM has a 32-device limit per channel. DDR SDRAM can go all the way up to 128 devices per channel by using four double-sided double-stacked DIMMs. So the capacity per channel of DDR is better than RDRAM, and servers need all the capacity they can get. (Actually with RDRAM, you can squeeze 128 devices per channel by utilizing repeater hubs, but that carries a performance penalty, just like the RDRAM-to-SDRAM translator hub.) 3) It's easier to implement chipkill on DDR SDRAM than on RDRAM. And as you may know, chipkill is an essential part of server RAS. 4) Intel experienced a lot of pushback from its server customers regarding DDR vs. RDRAM. Basically, none of Intel's server customers wanted RDRAM. (Makes me wonder whether Intel's other customers didn't mount as much of a pushback. Maybe they too see RDRAM's benefits on the desktop.) <Regarding Athlon, I am not sure if the dual DDR will be necessary. The single channel provides all the bandwidth the (future) Athlon chip is able to receive: 133 MHz x 8 bytes x 2 = 2.1 GB/s. Current Athlons on DDR platform are limited to DDR 200 anyway, with bandwidth of 1.6 GB/s. Which incidentally matches a single RDRAM channel.> First, AMD has plans to push the FSB of Athlon from 200 to 266 MHz. This is necessary in order to more easily match up with DDR's 266 MHz speed. And second, there is a chipset being developed that will support two Athlons and two DDR channels, all on one north bridge. Sounds like such a chipset will be part of a low-end server platform. (Incidentally, that north bridge will have more than 1,000 pins. That's not a trivial amount.) Tenchusatsu