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To: Plaz who wrote (41056)4/28/2000 5:18:00 AM
From: Bilow  Respond to of 93625
 
Hi Plaz; I missed your reference to the PS2 as a counterexample. But the PS2's RDRAM isn't what I would call a graphics memory. If it were, I wouldn't be saying that Rambus lost the graphics business. Instead, I believe you will see that memory referred to as a system memory.

The embedded DRAM is used for display, but it isn't big enough to hold all the information that describes a frame. Consequently, it's bandwidth can be a lot larger than my rule would suggest. It isn't a graphics memory because it doesn't hold the graphic, only parts of it. It is essentially a cache memory, not a display memory.

Information sufficient to create the frame image is located in a part of the PS2's system memory, though, and if you calculated the bandwidth that that memory used, and compared it to the size of that memory, you would very likely get a number similar to 120Hz, for the reason I gave before.

One of the primary purposes of general purpose system memory is to prevent disk from having to be used extensively as virtual memory. In that sense, main memory is acting as a disk cache. Since disk is extraordinarily slow, there is less reason for system memories to achieve the high bandwidths (per bit) that display memories achieve. That relationship is one that will undoubtedly change over time as the speed of disk accesses relative to processor speed changes. But video type bandwidth will probably always be around 120 Hz or so.

I dang near almost got into a lecture on the relationships between latency, bandwidth and sizes of cache memory as compared to the memory system that they cache for, but then I realized that we would end up quite pointlessly arguing about it for several days. Instead, we should explore this concept of the ratio of bandwidth to memory size a little more. It will give us great insight into trends in memory technology, and what the bandwidth differences between RDRAM, DDR, and SDRAM actually are. What I envision is a chart that has bandwidth as one axis, memory size as the other, with points marking various sizes of DIMMs, RIMMs, and component chips. The graphics limit will show up as a straight line through the origin, and memory chips sold into the graphics market will fall close to that line.

But first I have to establish some facts about our little indicator. First of all, I think it would be better if I kept the bandwidth in Hz, rather than putting it into seconds, as I have done in my previous calculations. For example, a 64MB memory with a bandwidth of 5.1GB/sec has a bandwidth per bit of 5.1GB/sec/64MB = 80Hz. This way, a larger number indicates a larger bandwidth per memory bit.

All the comparisons that you see in the press about memory talk about bandwidth per DIMM, bandwidth per RIMM, and bandwidth per pin. By looking at bandwidth per bit, there are a few things that we can see that are not otherwise obvious. This all boils down to a form of granularity.

My first rule for memory system design is that a memory system can never have a bandwidth per bit that is larger than the bandwidth per bit of the components that make it up. In other words, you can't make a slow component fast.

My second rule for memory systems: The maximum bandwidth per bit for a system is achieved when the memory components do not share any data buses, and the bandwidth per bit for that system is equal to the bandwidth per bit of the memory components that make it up. This says that you get the most bandwidth per bit when you make your memory system as wide as possible.

Perhaps I have not explained these concepts well. I'll post some examples later, but now I am getting a little sleepy.

-- Carl

P.S. Jim kelley, Re why I post here, when I don't have the stock or am short it: I post for entertainment. (Mine, not yours. :)