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To: John Walliker who wrote (42415)5/17/2000 2:27:00 PM
From: Bilow  Read Replies (1) | Respond to of 93625
 
Hi John Walliker; The two weeks is probably an understatement. The actual delay is more like 3 or 4 weeks. Some references for the sharing of manufacturing processes between DDR and SDRAM:

Sure, synchronous DRAM comes in two flavors-single data rate and double data rate (DDR). But both are essentially the same architecture made on the same line. Only a few mask-stage changes are made late in the production cycle to morph one into the other. That means chip makers can be rather nimble in responding to demand for either type. Neither buyer nor seller has to gamble three months ahead, which is the time it takes to move from raw wafer to packaged and tested DRAM.
ebnews.com

For Samsung, the 128-Mbit-density generation is the first time that both single-data-rate and DDR functionality will reside on the same base chip, with the final clocking designation determined during the application of the metal mask layer. "This affords maximum manufacturing flexibility and shorter lead times as well as lower cost for the emerging DDR function," the company said.
techweb.com

Mitsubishi uses a single-die design and manufacturing process for both memory types, with a metal mask option to differentiate the DDR SDRAM from the PC133 SDRAM near the end of the manufacturing process. The resulting manufacturing efficiency plus JEDEC-standard compliance and an easy transition path from conventional SDRAM provide a major step toward the adoption of DDR SDRAM as the leading main-memory alternative for high-end computing applications. This approach also helps establish the viability for eventual use of DDR SDRAM in mainstream PCs.
mitsubishichips.com

Pricing will play a key role in the eventual extent of the DDR market. "As we move forward, the DDR and single-data-rate [SDRAM] parts will be options on the same die, so that gives you some indication that the die cost premium will be minimal," Mitsu- bishi's Conkle said.
techweb.com

As far as references for mask sharing between x4, x8, and x16 devices, this is very well known industry knowledge. I couldn't find a quick reference to it, but it is well known.

Yes, the x4 and x8 DDR (and SDRAM) chips have the unwanted pads &c. diffused in (and largely connected in poly) the same as the x16, even though they are not used. That is why the parts come in packages that share all the pins (but the data lines), and cost exactly the same amount, and specify the same internal power consumption, etc.

-- Carl