Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Rambus (RMBS) - Eagle or Penguin -- Ignore unavailable to you. Want to Upgrade?

To: Ian Anderson who wrote (42865)	5/23/2000 10:25:00 AM
From: gnuman	Read Replies (2) \| Respond to of 93625

Ian, re: <I think it is limited to two per channel active, and the others must either be in standby or Nap.> Does that bring us back to latency issues? Almost sorry I brought the subject up. <g> Let the thread get back to other subjects.

To: Ian Anderson who wrote (42865)	5/23/2000 8:38:00 PM
From: gnuman	Respond to of 93625

Ian, re: <It's not allowed to have all the devices in active mode. I think it is limited to two per channel active, and the others must either be in standby or Nap.> Found the answer at the Intel site. (82820 MCH Datasheet) Up to eight devices can be in a Pool at a time. Up to four out of eight devices in a pool can be in Active Read/Write or Active state at a time. Can 8 devices on a RIMM be in a pool? Page 131 ftp://download.intel.com/design/chipsets/datashts/29063001.pdf