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Technology Stocks : Energy Conversion Devices -- Ignore unavailable to you. Want to Upgrade?

To: wily who wrote (4934)	5/25/2000 10:31:00 AM
From: dvdw©	Read Replies (1) \| Respond to of 8393

Wily the key word in your post is ON DIE. It is so true if the CPU manufacturer can place the OUM elements alongside and within the processor die, the off processor memory will be less the factor than it is today. The key here is how fast and how much will be slotted into the processor and with increasing demands for bandwidth how much off processor memory will be required. Looking for some kind of Hybrid to emerge from these developments. These are indeed exciting times for ENER.

To: wily who wrote (4934)	5/25/2000 2:35:00 PM
From: Plaz	Read Replies (1) \| Respond to of 8393

If OUM can achieve significant density advantages over current cache RAM, on-die OUM cache or large OUM chips as part of a multi-chip module could solve the memory bandwidth problem (which is not really a problem until processors get up to about 2 GHz) and make DDR/Rambus irrelevant. Very unlikely. There will always be need for higher speed chip-to-chip interfaces. To think otherwise goes against the entire history of computing. It is also much more likely to see OUM (if we ever see it) in a flash chip first (because of price and demand in that segment), followed by DRAM, then to an embedded cache scenario. Yes, integration saves money, but it always trails the leading edge of technology. This fall, Intel will finally release their system-on-a-chip (aka highly integrated) Timna product. Intel and AMD have enough to worry about making 40M+ transistor chips without integrating OUM and adding 7 steps (is that right?) to their fab process right off the bat. It could end up on chip eventually as an embedded DRAM cache, but that's a long way away to start making predictions on. I'd just be happy to see an OUM product! Plaz