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To: Elmer who wrote (103713)5/27/2000 11:10:00 AM
From: Scumbria  Read Replies (1) | Respond to of 186894
 
Elmer,

AMD has never shipped a single multi-processor/chipset combination.


Nice FUD. Especially coming the day after the news of the Athlon based supercomputer.

Scumbria



To: Elmer who wrote (103713)5/27/2000 11:32:00 AM
From: Scumbria  Read Replies (1) | Respond to of 186894
 
Elmer,

AMD has relied on a point to point architecture where no 2 processors share the same memory port. It looks to me as though they are really just moving the memory bandwidth bottleneck down into the memory controller rather that coming up with a better solution.

The next generations Alpha's will have a dedicated onboard DRDRAM memory controller. Maybe AMD is doing something similar?

Scumbria



To: Elmer who wrote (103713)5/28/2000 1:46:00 PM
From: Dan3  Read Replies (2) | Respond to of 186894
 
Re: With Intel's bus architecture, multiple processors share the processor bus.... AMD has never shipped a single multi-processor/chipset combination.

Yes, but AMD is using the MPU architecture licensed from Compaq/Digital. If you review

spec.org

you'll see an EV6 bus machine with a score greater than 15,000 while the fastest Intel bus machine I found was less than 1,000.

I think AMD's (licensed) bus architecture will do for now.

Regards,

Dan