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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Joe NYC who wrote (113128)	5/28/2000 3:14:00 PM
From: Joe NYC	Read Replies (1) \| Respond to of 1573243

Now this is getting thicker and thicker: isonics.com ... It has already been proven that removal of minority isotopes will result in substantially higher thermal conductivity. For example, the removal of only 1% carbon-13 to produce isotopically pure carbon-12 diamond resulted in a 50% improvement in room temperature thermal conductivity and over a 10-fold improvement at low temperatures. 1,2,3 Germanium has five stable isotopes with natural abundance?s of 7 to 36%. By concentrating one of the isotopes to 99.9%, the thermal conductivity of isotopically pure germanium-70 was increased 20% at room temperature and 1000% at 15o K.4,5 The thermal conductivity of isotopically pure silicon-28 thin films has been measured to be 60% greater than natural silicon at room temperature (see graph) 6 and 40% greater at 100 oC (chip operating temperature).... ...Manufacturing Benefits Normal manufacturing processes produce variations in transistors due to drain/source size variations, wafer flatness variations, dopant implant variations, contact resistance variations, etc. These variations produce current density variations and local ?hot spots? in the integrated circuit. These hot spots can reduce the performance since the electron mobility decreases with increasing temperature, and junction leakage increases. This is one reason that microprocessors are speed sorted after final manufacturing. From the same processed wafer, some microprocessors will run reliably at 650 megahertz, for example, but some will only run at 500 megahertz or below, reducing yields and revenue to the company. The problem gets worse as the switching speed increases since power dissipation increases with increasing frequency. Isotopically pure silicon-28 can minimize these ?hot spots?, producing a larger number of higher speed chips and more usable chips per wafer (see diagram below). Performance Benefits Most of the heat generated in a microprocessor occurs in the logic core where 5 to 10 million transistors are operating at full rated speed. This area comprises only 1-2% of the area of the silicon chip and localized temperatures can exceed 150oC. Getting the heat out of this small area and into the rest of the chip and the package is an engineering challenge that silicon-28 can effectively address. Lower transistor junction temperatures due to isotopically pure silicon-28 will directly improve transistor performance due to higher carrier mobilities, reduced junction leakage in logic devices, reduced charge leakage in memory devices, and reduced metal electromigration. The lower temperatures possible will improve the reliability and lifetime of critical devices. Design Benefits The higher thermal conductivity of isotopically pure silicon will allow higher density circuits to be designed with smaller die sizes and more chips per wafer, reducing costs. Higher frequency operation (higher speed switching) will enable improved device performance. Isotopically pure silicon can be combined with other advanced wafer technologies such as silicon-on-insulator (SOI) and silicon-on-sapphire (SOS) wafers, where thermal management is of critical interest due to the electrical and thermal insulation of the active silicon layer. Other, more subtle benefits may also be available with isotopically pure silicon. As device dimensions shrink, the gate oxide thickness in CMOS devices also must decrease. As the transistor size approaches 0.1 micron, the gate oxide thickness will be about 2 nanometers (0.002 microns). This is equivalent to 5 atomic layers of silicon dioxide. The gate oxide integrity (GOI) or breakdown voltage of oxides of this thickness is a key stumbling block to making smaller devices. The more perfect crystal structure of isotopically pure silicon and silicon dioxide may lead to improved gate oxide integrity and fewer carrier surface traps at the silicon-silicon dioxide interface. It has already been shown that the use of deuterium, an isotope of hydrogen, instead of normal hydrogen during the processing of CMOS devices has lead to reduced ?hot electron? damage and 50 to 100 times longer lifetimes before oxide wearout 9. Recently, the use of isotopically pure silicon to make "quantum" computer chips has been proposed10. While many difficulties need to be overcome before this kind of chip can be built, it is more near term than other "futuristic" designs such as biological or optical computers. In summary, isotopically pure silicon can deliver the following benefits to semiconductor device manufacturers: 1. Improved device performance ú Higher speed switching ú Smaller die sizes 2. Higher reliability devices ú Fewer hot spots ú Lower temperatures at active junctions 3. Improved yields ú Increased number of high speed chips 4. May be able to delay next generation of manufacturing technology ú Reduced capital expenditures 5. Less cooling required ú Smaller/cheaper packaging possible 6. Net Cost Savings ú Due to all of the above And now this: Isonics Developments Isonics Corporation has taken the concept of isotopically pure silicon and made it a reality. Idled nuclear weapons facilities in the former Soviet Union manufacture the isotopically pure raw material, silicon tetrafluoride. This raw material is imported into the U.S. where it is chemically purified and transformed into commercially more useful materials such as silane, trichlorosilane, polysilicon, and ultimately silicon wafers. Isonics continues to explore improved isotope separation methods and is funding research at the Institute of Stable Isotopes in Tblisi, Georgia. Recently, Isonics and Eagle-Picher Industries have announced that a multi-ton pilot plant for the production of silicon isotopes using chemical exchange technology will be constructed in Oklahoma to support the production of bulk silicon-28 wafers. This pilot plant will be on-stream early in the year 2000 and should yield up to a 10x reduction in the cost of isotope separation... ...The first product to be offered for sale is an epitaxial silicon wafer, which is the starting wafer for all advanced microprocessors. This wafer has a thin layer of isotopically pure silicon-28 grown on the surface of a prime quality, natural silicon wafer. Epitaxial wafers made to custom specifications are currently available in a variety of sizes to integrated circuit manufacturers. Many of the advantages of isotopically pure silicon can be obtained with this type of wafer, while keeping costs down. During 1999, Semiconductor manufacturers such as Advanced Micro Devices and Cypress Semiconductor started evaluation programs using silicon-28 epi wafers for microprocessor and memory applications. Additional manufacturers are expected to start evaluation programs this year. Bulk silicon-28 wafers are planned to be available by the end of the year 2000. These wafers are targeted for power semiconductor applications and applications where the maximum temperature reduction is necessary. Initial modeling studies have indicated that peak temperature reductions of up to 30oC may be possible in advanced microprocessors due to the higher thermal conductivity of silicon-28 bulk wafers. Even though silicon-28 wafers will cost more than natural silicon wafers, semiconductor manufacturers can save money by their use through higher yields and reduced costs for external cooling systems. The table below shows that silicon-28 is very cost competitive to alternative cooling solutions for advanced microprocessors and can be used in conjunction with these techniques for the maximum benefit. Cooling Technique Cost per Microprocessor Cryogenic-cooler $350 and up Thermoelectric cooler $35 Fan & heat sink $5 to 10 Chip thinning $2 Si-28 epi wafers $0.10 to 1.0 * Si-28 bulk wafers $2 to 25 * Joe