Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Rambus (RMBS) - Eagle or Penguin -- Ignore unavailable to you. Want to Upgrade?

To: Tenchusatsu who wrote (43168)	5/30/2000 2:56:00 AM
From: Joe NYC	Respond to of 93625

Tenchusatsu, Essentially, what Tom has done here is heavily eight the benchmark tests to highlight the known initial latency penalty. He uses this "initial latency" penalty to wipe out the bandwidth advantage that RDRAM has over SDRAM with normal programs. So what Tom has done is cynically repeal the laws of "program locality" and "data locality" which have guided the develop of computer memory architectures for the last 30 years. He has no shame and a firm belief in the ignorance of the masses. That is what he has done in his own latency benchmark, which is only 1 of 4 or 5 benchmarks. No matter how you test the latency, Rambus will come out short, against SDRAM, which I guess is universally accepted. My comments were strictly on the Stream benchmark, which is measuring the memory performance, especially the bandwidth. I even linked the code, which can be read by anyone who ever took programming 101. The program has 4 components, and in each one of the 4 tests, the program steps through array(s) sequentially 1. it assigns an value of an element from one array to the element of another array, or a(i) = b(i) 2. scales value of one element one array and stores the result in an element of another array, or a(i) = qb(i) 3. stores sum of element of 2 arrays in third array, or a(i) = b(i) + c(i) 4. stores the sum of element of 1st array and element of 2nd array scaled by a constant, or a(i) = b(i) + qc(i) All these are done sequentially on an array that is hopefully larger than L2, because otherwise, you would not be testing the memory at all. If Rambus can't do this well, what is it that it can do well? If I was testing bandwidth, I would write another program, in which I would just copy chunks of memory from one place to another, rather than one element at the time, which is where Rambus may do better. Why doesn't some Rambus sponsored website do something like that? The Rambus marketing crap that the sites like Hardware Central post is not going to persuade anyone. Yep, we can trust Van Smith to be an impartial journalist, all right! Is Hardware Central impartial? Can you trust them? Was Anand's Part 1. impartial? Joe