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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: steve harris who wrote (113508)	5/30/2000 11:34:00 PM
From: Scumbria	Read Replies (1) \| Respond to of 1574267

Steve, Atiq is developing a network processor, about 2 years too late. C-Port and Sitera have a huge jump on the 2 dozen or so companies which are hacking away at this market. If it keeps Atiq and his Nexgen compadres off the street and out of trouble, I guess it is a good thing. Scumbria

To: steve harris who wrote (113508)	5/30/2000 11:44:00 PM
From: Joe NYC	Respond to of 1574267

Here is an interesting post by Dale LaRoy Splitstone on Aces BBS, estimating # of dice per wafer for Thunderbird: aceshardware.com I have heard it estimated that the Fab25 die size will be about 120mm2 at 180nm. The die size at Fab30 is supposed to be smaller, I have read about 100mm2, but have my doubts. A 200mm wafer has about 31,159mm2 of surface area. So start with an initial estimate of about 259 dice per wafer at Fab25. Motorola estimates 2.5 times the number of dice per 300mm wafer as 200mm wafer, so since the 300mm wafer has 2.25 times the area and should have roughly 50% higher edge trimming loss than a 200mm2 wafer, we can figure roughly .75 times the edge trimming loss of the 200mm2 wafer is equal to 25% of its surface area. So the total edge trimming loss would be 33% of its area (assuming 300mm wafers actually can accommodate 2.5 times the dice of 200mm wafers). This would work out to about 173 dice per wafer at Fab25. As I stated, I don't know what the die size is at Fab30, but I would bet that a Fab25 die at 180nm would be at least 36/25 times the size of a Fab30 die at 150nm. With the same percentage trimming loss at 150nm as 180nm, this would project a capacity of about 235 dice per wafer. Of course, with smaller dice, trimming losses should be less. In this case, about 17% less. So we could add another 19 to 20 dice to this estimate, placing it at about 255 dice per wafer. And this is a conservative estimate based on Motorola's claim of 2.5 times as many dice per wafer at 300mm than 200mm. Another way of estimating is to start with a square of 141mm per side in the center of a 200mm diameter circle. This would yield 20,000mm2 of die area for rectangular dice, yielding 166 dice of 120mm2 each. Add to this about one half of the remaining 11,159mm2 area, which would be about 5,579mm2 for another 46 dice per wafer, and our estimate rises to a total of 212 dice per wafer at 180nm at Fab25. This would yield an initial estimate of 288 dice per wafer at 150nm at Fab30 without adjusting for lower trimming losses due to smaller die size. Adjusting for the lower trimming loss, this comes out to about an additional 11 dice per wafer, and our rough estimate comes to 299 dice per wafer at 150nm at Fab30. Personally, I think that even the later technique yield a somewhat low estimate. So I would say more than 300 T-Bird dice per wafer at 150nm at Fab30.