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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: porn_start878 who wrote (114043)	6/3/2000 11:24:00 PM
From: Scumbria	Respond to of 1587356

Max, As for the L1 miss rate, I think someone tried to benchmark the Athlon with the L2 cache disabled (to speculate on an eventual Spitfire without L2) and the result was very disappointing. No L2 will produce terrible results. With a 256K L2, about 0.1% of all memory accesses go to (very slow) DRAM. Without an L2, about 1.0% (10X as many) memory accesses go to DRAM. The latency for DRAM is very long, and the penalty of no L2 is very high. This is a different scenario from on-chip vs. off-chip L2. The latency difference between the two is only a few clocks. Thus the performance difference is minimal. I don't understand well the impact of a high associativity It is very straightforward. Higher associativities will produce lower miss rates in the cache. I was expecting a 20-30% increase, I still expect at least 10% 10% is not out of the question. Hope you're wrong :) Not likely. ;^)) Scumbria