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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Cirruslvr who wrote (114181)	6/4/2000 11:26:00 PM
From: Jim McMannis	Read Replies (1) \| Respond to of 1575598

4-8% speed increase is a little less than the 7-10% I had calculated. I hope AMD has at least 1100 Mhz on the announcement tomorrow. When Intel used to announce an enhancement they "used to" manage about a 7% performance increase and a jump in Mhz. I hope AMD follows through on the later tomorrow.

To: Cirruslvr who wrote (114181)	6/4/2000 11:28:00 PM
From: PINBOTMAN	Respond to of 1575598

Check Out Yahoo Article A pre announcement from Sanders. Yields and speed grades as good or better than Austin. Long time lurker. biz.yahoo.com

To: Cirruslvr who wrote (114181)	6/5/2000 12:05:00 AM
From: Elmer	Respond to of 1575598

Re: "I am surprised the PIII is faster than AThlon is a couple of benchmarks. Looks like the PIII L2 cache is better than the AThlon's. PIII's L2 cache has something like a 7 cycle latency vs. Thunderbird's 11 cycles (according to Anand), and PIII's cache is 256 bit wide vs. Thunderbird's 64 bit. 1995 core keeps up with 1999 core. Amazing, huh?" Amazing yes. It goes to show that despite the continuous claims of superiority, the Athlon/Thunderbird is still chasing Intel's old antiquated 1995 design. Either Intel is better than they are given credit for or the "experts" aren't so expert. I think it's a little of both. EP

To: Cirruslvr who wrote (114181)	6/5/2000 2:07:00 AM
From: Tenchusatsu	Read Replies (3) \| Respond to of 1575598

Cirrus, <Looks like the PIII L2 cache is better than the AThlon's. PIII's L2 cache has something like a 7 cycle latency vs. Thunderbird's 11 cycles (according to Anand), and PIII's cache is 256 bit wide vs. Thunderbird's 64 bit. 1995 core keeps up with 1999 core. Amazing, huh?> Two comments: 1) T-bird has a higher L2 associativity (16-way) than Coppermine (8-way). The benefit of this is slightly fewer L2 cache misses. The trade-off here, however, is the longer latency: a higher associativity slows down the cache. That's why the longer latency is required. 2) The 64-bit BSB width is surprising to me. With the "exclusive" L2 cache (a.k.a. Victim Cache), I figure T-bird will need the BSB bandwidth a LOT more than Coppermine because of all the swapping of data between L1 and L2. Maybe AMD will increase the BSB width on Mustang. Tenchusatsu