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To: jim kelley who wrote (43411)	6/5/2000 1:59:00 AM
From: Bilow	Read Replies (2) \| Respond to of 93625

Hi jim kelley; Re Anandtech's article. Do you have any comment on this statement of his? A set associative cache divides the cache into various sections, referred to as sets, with each set containing a number of cache lines. With an 8-way set associative L2 cache, each set contains 8 cache lines, and in a 16-way set associative L2 cache, each set contains 16 cache lines. anandtech.com -- Carl

To: jim kelley who wrote (43411)	6/5/2000 4:01:00 PM
From: Joe NYC	Read Replies (1) \| Respond to of 93625

jim kelley, Your quote from Anand's review: "If you're borderline between purchasing an Athlon or a Pentium III, the latter will only hold a major performance advantage if you're going to be running on an overclocked BX platform. Otherwise the decision is pretty much a toss up and one that only you can make for yourself." I am curious why you cut off the quote where you did. It continues: "The only suggestion we can make is to stay away from the 820 + RDRAM platform for now, it is entirely too expensive for an end user; unless the price of RDRAM comes down there is no reason to pursue the platform." anandtech.com Joe