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To: Tony Viola who wrote (104069)6/6/2000 11:19:00 AM
From: Elmer  Read Replies (1) | Respond to of 186894
 
Re: "Well, before I get jumped, with all the super fast L1, L2 (and L3 sometimes) cache that can be on die, or very close to on die, what IS the big deal about main memory any more? So you pay a 20, 30 or 40 cycle penalty once in a blue moon."

The big deal is pincount. Assuming RamBus worked and was available you can get high bandwidth with about 1/4 the pins needed for an SDRAM type interface plus all the other associated issues like added power and ground pins, simultaneous switching problems etc that go with SDRAM. You can always add more pins to match RamBus bandwidth but up until now at least it seemed that RamBus was the clearly better solution. Look at Alpha's 21364 design with their dual RamBus on-die controllers. Imagine the added pins you'd need to match that bandwidth plus the internal noise generated by 128 or 256 pins all switching at the same time! Of course all this is moot if you can't buy RamBus memory or it just plain doesn't work.

EP