SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Rambus (RMBS) - Eagle or Penguin -- Ignore unavailable to you. Want to Upgrade?


To: blake_paterson who wrote (43660)6/7/2000 5:36:00 PM
From: gnuman  Respond to of 93625
 
blake, re: Comments on patents.
While I have some patents, (long expired), I have no expertise in patent law.
As I remember, after the Patent Attorneys finished rewriting the claims in legalese I had a hard time figuring out what it was I patented. <VBG>



To: blake_paterson who wrote (43660)6/7/2000 5:50:00 PM
From: pheilman_  Read Replies (3) | Respond to of 93625
 
Claim #23 in US6,038,195 does describe SDRAM operation.

SDRAM has a register, the Sync DRAM mode register, SDMR, that controls how many clocks to wait after the read request or CAS to start delivering data. Actually the patent perfectly describes SDRAM, not too surprising as it was filed years after SDRAM was introduced. It has to have been filed as a continuation of another patent.

I cannot think of another device that would have had such a register before SDRAM. SDRAM has a long internal delay to handle combined with the subsequent fast data rate. FIFOs had the rising and falling clock transfer first, but what else needed to delay the output by a number of clocks.

An historical note, the first commercial use of SDRAM was the ill-fated Sega Saturn, Hitachi created an SDRAM interface in the SH3 processor and some SDRAMs for that console. This console was finishing its run in the market before this patent was filed.