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To: Bilow who wrote (104249)	6/8/2000 6:24:00 PM
From: Tenchusatsu	Read Replies (1) \| Respond to of 186894

Carl, I don't know how to respond to what you just said. You came across as extremely intelligent and arrogant at the same time. I don't have the level of expertise to address what you presented. Yet I really doubt you have the level of expertise to discredit every single engineer out there who doesn't see Rambus in such a negative light as you do. (i.e. Intel, Sony, AMD, Samsung, Toshiba, Micron, Sun, etc.) Despite all that, I want to thank you for taking the time to explain the technical stuff to me. Though I'm not sure whether to accept your statements at face value, at least I have a better understanding of the challenges surrounding Rambus and its implementation. Tenchusatsu

To: Bilow who wrote (104249)	6/8/2000 8:48:00 PM
From: Dan3	Respond to of 186894

Re: Conclusion: SDRAM DIMM routing is 5% narrower, overall then RDRAM RIMM routing... Awesome, amazing post. Who'd have thought it? Regards, Dan

To: Bilow who wrote (104249)	6/8/2000 11:12:00 PM
From: jim kelley	Read Replies (1) \| Respond to of 186894

Carl, Your RIMM and DIMM trace width calculations are too high. (Gaps and isolation grounds are for the inner traces not the outer ones and you are counting them for every signal.) But no matter, there does not seem to be a problem making RIMMs or DIMMS. The impedance tolerances are +-10%. I notice that the 820 MOBO is specified as a 4 layer board. The location of the RIMM modules is limited by the maximum length of the transmission line. This places the RIMMs near the memory controller. So there should be no problem connecting the memory with the memory controller as far as the trace connections are concerned. This has nothing much to do with making money on the stock. <G> :)