Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Elmer who wrote (115398)	6/11/2000 1:30:00 AM
From: pgerassi	Read Replies (1) \| Respond to of 1583684

Dear Elmer: Cite the benches using same NBs. It is more like 28 for Tbird, 1 tie, and 1 for Cmine and that was on SSE only code. I still think that a manufacturing plant yields a probability curve. The usuable bin splits are a yield not a bin split. Your bin split is arbitrary and is a term incorrectly used by the process engineers. This term should be used by the test engineers. A maximum speed yield curve is estimated by us from available data. I suspect that the real speed yield curve does not deviate much from the estimated one. The final maximum speed yield curve is determined by test, process, packaging, design, and the market. Here is where the Cmine is currently failing against K75, Tbird, and possibly Duron. After one year it appears that there is now three seperate efforts to build Athlon optimized compilers. When Athlon is optimised by assembly, Cmine loses big time. The days of SPEC victories are numbered for Cmine. If the average Tbird is 30% faster in clock than a Cmine, even the SPEC advantage switches to Tbird. Pete