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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Scumbria who wrote (115704)	6/13/2000 11:27:00 AM
From: pgerassi	Respond to of 1577019

Dear Scumbria: It is buffered. It is that the code used in the latency test is DESIGNED to overrun any such buffering. If it buffers 1, 2, or 3 lines, there will come a point where successive iterations will fill this buffer up and force rewrites to occur. I think that at 64 bytes per cache line, it could still do 6,144 accesses per run one after the other and still remain in the L1 & L2 caches. When it tests it outside of that range, is where it starts seeing 160 to 190 cycle latencies. This is an artifact of the code being used to test this. In the future, this will probably be recoded to remove this effect. Remember victim caches, at least in the x86 world, just were not used. Thus the program never needed to check for the particular artifacts generated by such caches. In any case, such problems are attempted to be minimized by most compilers due to the poor performance of any resulting software on any current x86 CPU. Pete