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Technology Stocks : Rambus (RMBS) - Eagle or Penguin -- Ignore unavailable to you. Want to Upgrade?

To: Bilow who wrote (45339)	6/21/2000 10:14:00 AM
From: Ali Chen	Read Replies (1) \| Respond to of 93625

<Rambus patents that mentions adjustable latency> Carl, from reading the claim, "23. The apparatus of claim 22 for storing and retrieving data, further comprising means for the master to request the first memory to prepare for a bus transaction by sending a request packet along the bus, wherein the first memory and the master each includes (1) a means for initiating an internal phase for preparing a bus access phase of the bus transaction and (2) a bus access means to effect the bus transaction during the bus access phase, wherein the request packet comprises a sequence of bytes containing first control information and a first address, wherein the first control information includes information about the requested bus transaction and about an access time, wherein the access time corresponds to a number of bus cycles that must intervene before beginning the bus access phase, and wherein the first address points to a memory location within the discrete memory section of the first memory." it is apparent that the "invention" of 1992 requires the access time information to be sent with every request packet for every transaction, and not stored one time in individual chips during initialization/configuration as in current SDRAM. I think Hitachi is right when saying that the ability to configure access time of DRAM came later from ideas gathered at JEDEC meetings.