SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?


To: Elmer who wrote (118085)6/28/2000 3:40:00 PM
From: pgerassi  Read Replies (1) | Respond to of 1576830
 
Dear Elmer:

You asked for a case to be made that increasing the speed distribution could impact yields. I cited a case where it happened. Case closed.

Routing changes, steppings, etc. are design changes. Using copper is an example of a better materials change. Shrinking the oxide thickness or an optical shrink are examples of manufacturing (process) changes. Some changes can effect two or even three of these basic ways, like local interconnect.

Pricewatch has 3 pages of 500, 1 page of 533, 5 pages of 550, 13 (8 + 5) pages of 600, 11 pages of 650, 9 pages of 667, 11 pages of 700, 9 pages of 733, 9 pages of 750, 13 (8 + 5) pages of 800, 6 of 850, 5 of 866, and 2 of 933 (all Coppermine). The peak for 100MHz bus is somewhere between 650 and 700, both 11 pages, and is somewhere between 667 and 733, both 9 pages, on 133MHz bus. The peak has shifted up, maybe, to around 700MHz, a gain of 50MHz. At least Intel appears to be moving about 50MHz every two months or so.

You are right about Intel is getting better. From DIY, they appear to be around 4 to 6 months behind. Great! AMD will get a push to release higher grades next month.

Pete