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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: milo_morai who wrote (119025)	7/3/2000 8:26:32 PM
From: Elmer	Read Replies (2) \| Respond to of 1578281

Re: "Because the L2 operates at much higher speeds the propagation of signals becomes more of a Issue. Different MB makers may have different physical layouts and didn't take these timing issues(propagation delay) into consideration. You also may have issues with capacitive coupling between traces runs as Fo increases (Xc=1/2piFoC)" Milo for a guy who has me on his ignore list you sure read a lot of my posts, but to the point: I think you are mistaken. The L2 is invisible to the MB(for all intents and purposes). It is either on the backside bus for an Athlon or internal for the TTurd. The FSB interface is the only thing the MB sees and that operates at the same speed as any other K7 processor, 100MHz double pumped. There is no MB layout issue that is effected by a 1GHz processor, assuming the processor is meeting the FSB specs and I can see no reason why they would change between processor to processor, regardless of internal frequency. So I ask again, if all Athlon generation processors interface to the MB using the same protocol and the same FSB speed, they should look identical to the MB, so just what timings would be any different? BTW my dual Celeron MB uses 2 processors of differing internal speeds and it makes no difference because they both operate on the same P6 bus protocol and timings. No difference to the MB cause they look identical. EP