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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Pravin Kamdar who wrote (119408)	7/6/2000 11:34:42 AM
From: EricRR	Read Replies (2) \| Respond to of 1580179

Has this been posted? Micron Althon SMP. CPU Support: Including SMP Athlon? Micron is leveraging itself into several computing arenas. Samurai DDR supports all current Intel P6 based CPUs. The first working boards built in December, 1999 utilized Intel's Slot 1 architecture, but the final product will natively accept Slot 1, Socket 370, and Socket FC-370 designs. Micron has also recently finished support for the AMD Slot A and Socket A architectures, and hopes to aggressively market this K7 DDR chipset as a direct competitor to Intel's i840 platform. With SMP (Symmetric MultiProcessing) support, Micron could even be the first vendor with a multiple CPU Athlon product. Several OEMs have expressed interest in providing SMP Athlon systems, as the K7 architecture provides extremely efficient server computing. Multiple Northbridge chips can be interconnected, thus offering expanded SMP support. The SMP architecture will also benefit directly from DDR memory support, as DDR will help to improve disk I/O rates and network efficiency. The server market will likely take notice of this feature, since newer operating systems like Windows 2000 and Linux 2.3 are proving that SMP and high speed memory can place the x86 architecture into the forefront of high speed computing. sysopt.earthweb.com Micron is planning for quantity shipments of Samurai DDR this fall. They will first ship the Intel compatible chipsets, and later release the AMD counterparts if DDR memory sales meet the projected estimates. What does this mean? DDR should meet any projected estimates because... Willy "2" (1H 2001) will support SDRAM theregister.co.uk ntel's 479 pin son of Willamette, due for launch next year, now has its very own codename, Prescott. A die shrink from 0.18 to 0.13 micron, Prescott and its associated Tulloch chipset are expected to support both synchronous and Rambus memory. ®