Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Rambus (RMBS) - Eagle or Penguin -- Ignore unavailable to you. Want to Upgrade?

To: pompsander who wrote (46655)	7/6/2000 9:04:00 PM
From: mishedlo	Respond to of 93625

New patent for Rambus? What does it refer to. ====================================================== The link below refers to the abstract of patent # 6,085,284. This is dated 4 of July 2000. Method of operating a memory device having a variable data output length and an identification register patents.uspto.gov Inventors: Farmwald; Michael (Berkeley, CA); Horowitz; Mark (Palo Alto, CA). Assignee: Rambus Inc. (Mountain View, CA). Appl. No.: 252,993 Abstract A method of operating a synchronous memory device, wherein the memory device includes a plurality of memory cells and a register for storing an identification value which identifies the memory device on a bus. Block size information is provided to the memory device, wherein the block size information specifies an amount of data to be output onto a bus in response to a read request. The read request is issued to the memory device, and includes identification information, wherein in response to the read request, the memory device determines whether the identification information corresponds to the identification value stored in the register. When the identification information corresponds to the identification value, the memory device outputs an amount of data corresponding to the block size information onto the bus synchronously with respect to at least a first external clock. The memory device may further include a programmable register. An access time value may be provided to the memory device wherein, in response, the memory device stores the access time value in the programmable register. Here, the access time value is representative of a delay to transpire before data is output onto the bus in response to the read request.