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To: Tony Viola who wrote (105648)7/14/2000 3:19:19 PM
From: NightOwl  Read Replies (2) | Respond to of 186894
 
Sorry about all the broohaha TV.

I suppose it isn't a rush item for anyone but me. :8)

I doubt I can explain this briefly, but I recently found out that there are actual current proposals for DDR-II carrying a 400MHz rate, and that there has been for some months a level of disagreement over whether or not there was even a need for DDR-II considering the performance expectations for DDR-I at 266MHz and the asserted potential to drive DRAM cores to 200MHz and beyond.

Knowing the recent flak over RMBS single channel DRAM performance specs on the INTC web site, the anti trust/FTC rumors circulating in the memory sector press, and further making the assumption that INTC wants to maintain/regain its leadership over CPU's, bus, and chipsets, I put all this together and concluded:

1) That INTC will not saddle itself with a non-standard form of memory;
2) That if Willy and Foster both appear with a 400MHz bus neither DDR-I nor DRDRAM (single channel) could be long dominant in the market place, if ever; and
3) That if the future projected speeds of Willy and Foster actually require the use of memory to CPU data exchanges higher than 200-266MHz bus speeds because of some technical requirement it would make number 2 a certainty.

I figured that if DDR-I and Single Channel RMBS aren't going to be around long, the earnings in the chip equipment sector and memory sector will be fairly safe bets well into 2003.

If they can do the job for that entire period or longer; then we only have the long delayed move to 300mm wafers and consolidations to move the market, and I don't think that's enough to keep the "bust" side of the commodity memory market cycle from coming sooner rather than later.

...Well it sounded better when I was just "thinking" it.
Thanks to everyone for all the info. I will go back to lurking.

0|0



To: Tony Viola who wrote (105648)7/14/2000 3:41:42 PM
From: Tenchusatsu  Read Replies (1) | Respond to of 186894
 
Tony, <[The Willamette bus is] not 400 MHz, but some fraction of that and then double or quad pumped. Anyway, I think it's an overhyped parameter compared with CPU and cache architecture.>

The Willamette bus is 100 MHz quad-pumped. Yes, the 400 MHz figure is a little overhyped, but then again, no one is complaining about AMD's hype over their 200 MHz Athlon interface (which is actually 100 MHz double-pumped).

<You'll notice that servers don't push any envelopes in a major way when it comes to memory architecture.>

That's because servers gain memory bandwidth the old-fashioned way: They brute-force it. So the bandwidth per memory channel doesn't have to be very much, since servers employ multiple memory channels anyway.

Tenchusatsu