Is Via Baiting Intel Once Again?
(07/19/00, 3:19 p.m. ET) By Mark Hachman, TechWeb News
Although the legal struggle between Intel and Via Technologies has ended peaceably, Via executives seem eager for a rematch.
The tangled legal knot surrounding the PC core logic market grew even more puzzling Tuesday, as sources told Electronic Buyers' News that Intel (stock: INTC) was legally prohibited from manufacturing chipsets using double-data-rate memory until 2003 through its license with Rambus (stock: RMBS).
The prohibition is important, because Intel rival Via laid out a top-to-bottom roadmap of chipsets using competitive DDR memory for the PC and server market.
But the matter grows more complex. Late Tuesday, a senior marketing executive at Via seemed willing to renew Via's legal struggles by disclosing plans to develop chipsets for the forthcoming Pentium 4 without the appropriate license from Intel.
In a presentation at the Platform Conference in San Jose, Calif., Via's director of product marketing, Eric Chang, said the company plans to ship an Apollo Pro 2001 chipset next year for a future IA-32 CPU. When asked for clarification, Chang acknowledged that the “IA-32” processor was the Pentium 4.
The Apollo Pro 2001 will include support for PC2600 double-data-rate memory and AGP4X, but a date for product samples has not been determined.
That disclosure apparently means that either Via will worry about product plans first and legal permission later, or that Intel and Via are in discussions over a bus license. After a reporter asked Chang to clarify how Via would sell a chipset without the appropriate license from Intel, Chang replied, “History will repeat itself.
"Via has over 40 percent market share," Chang added. "Intel definitely wants us to be in their camp.”
The furor over core logic chipsets, while obscure, strikes at the heart of the PC and server design. The core logic chipset connects the PC's memory to the microprocessor and the rest of the computer, and has emerged as a rally point for a score of legal and technical skirmishes.
Companies like Via, which is challenging Intel for the top spot of the chipset market, view the industry-standard DDR memory as cheaper and more effective than the competing Rambus memory. At the same time, Via is attempting to manufacture chipsets connecting to microprocessors supplied to both Advanced Micro Devices (stock: AMD) and Intel.
Via has sidestepped one issue, the licensing fees associated with Direct Rambus DRAM, by passing on the technology in favor of DDR memory, according to Chang.
“Rambus is a wonderful technology, but ahead of its time,” Chang said.
A bigger issue for Via is designing Intel- and AMD-compatible chipsets. While AMD executives have chosen Via as a key partner and developer of mass-market chipsets for the company's Athlon microprocessor, Intel has proven a more reluctant bedfellow.
Via, like other chipset manufacturers, has not obtained a license to use the Pentium 4 bus. Intel filed its first suit against Via last year over a bus dispute, revoking Via's Pentium III bus license amid claims of patent infringement and other charges.
Intel and Via settled the suit earlier in July, although Intel still has a pending claim against Via concerning the use of microprocessor technology Via purchased from National Semiconductor (stock: NSM) and Integrated Device Technology (stock: IDTI) last year.
A spokesman for Intel, Santa Clara, Calif., declined to comment beyond stating that “Willamette, now known as Pentium 4, was not part of that [licensing] agreement.”
Via and its own rival, Acer Labs, discussed their own DDR plans at the conference. Acer disclosed few details of the forthcoming M1547, because corporate policy dictates that the company wait for products to be manufactured before they can be discussed, Acer executives have said.
Chang and Via executives were under no such compulsion. Via disclosed a sweeping approach to DDR that included a balanced design and internal bus similar to that used by Intel.
The initial DDR chipsets will be developed for the Intel microprocessor lineup first, Chang said. The first incarnation, the Apollo Pro 2000 P6 DDR, will feature a dual interface to PC2100 DDR memory as well as PC133 single-rate synchronous memory, although designers will have to choose one or the other.
The product is sampling this month, Chang said, and will enter production in the fourth quarter.
The Apollo Pro 2000 P6 DDR and subsequent chipsets will use the Via V-Link, a proprietary bus connecting the two chips of the chipset, known as the “north” and “south” bridges. The V-Link frees up the main PCI bus, the previous connection between the north and south bridge, to handle other data.
In its current incarnation, the V-Link is an 8-bit bus running at 66-MHz, transferring 266 Mbytes/s. Future chipsets will widen that bus to 16-bits and beyond.
Two versions of the Apollo Pro DDR series will be manufactured, one each for the AMD Athlon and Intel Pentium III; the Athlon derivative will begin sampling later in the third quarter. Each of the two Apollo Pro DDR chipsets will also have a successor integrating a graphics core designed by S3 (stock: SIII), which is attempting to merge its chip operations with Via.
The P6- and K7-DDR SMA chipsets will feature a 133-MHz front-side bus.
Although every Apollo Pro chipset made will allow two processors to be connected in parallel, Chang said, the company plans to design a chipset optimized for servers beginning in the first half of 2001.
The Pro DDR Server chipset, which will only be designed for Intel's microprocessors, will use the faster V-Link bus, PCI-X expansion capabilities, and support for PC2100 memory. |
