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To: jim kelley who wrote (48629)8/1/2000 3:12:07 PM
From: Scumbria  Read Replies (2) | Respond to of 93625
 
Jim,

CPU's can only accept data from one request at a time, and the only DRAM issue which is important to a CPU is latency.

Like DRDRAM, SDRAM has the ability to handle multiple requests at a time. You can read data from one bank, and precharge or open the other banks simultaneously. Data can be read seamlessly from multiple requests to different banks.

Scumbria



To: jim kelley who wrote (48629)8/1/2000 3:17:00 PM
From: gnuman  Respond to of 93625
 
Jim, When did the bus get 32 bits wide? <G>
"The bus consists of four byte-sized (8 bit) paths,.."