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Technology Stocks : Rambus (RMBS) - Eagle or Penguin -- Ignore unavailable to you. Want to Upgrade?

To: NightOwl who wrote (48948)	8/4/2000 8:06:52 AM
From: gnuman	Respond to of 93625

Magee's latest/Dell RDRAM upgrade price Here's the latest from the Reg. theregister.co.uk Anyone. Did the 128MB RDRAM upgrade for the XPSB series increase in price? (Now $400 for non ECC). dell.com

To: NightOwl who wrote (48948)	8/5/2000 5:23:27 AM
From: Bilow	Read Replies (1) \| Respond to of 93625

Hi NightOwl; Re why embedded is different from "discrete" chips... In short, the embedded DRAM inside an SOC doesn't have to be available from multiple makers as a commodity item. Instead, it is a small part of a specialty item. In this case, the engineer has no reason to pick any particular interface over another, they all have the same costs ($0), and any decent one will give him more bandwidth than he needs. Design engineers hate to include rare and unusual parts (also known as "single source" parts) in systems. That's why no one (almost) has a DRAM maker design a memory chips just for them. Think about it. If you could go to the memory maker and ask for a memory chip that was exactly what you needed, wouldn't everyone do this? As always, it is a matter of cost. Engineers use standard DRAM cause they know that it will be available (because many companies are going to be making it), that it will be the cheapest (at least for long term contracts), and so they choose it. When you use a standard DRAM, you got to use a standard DRAM interface. That's all she wrote, this is essentially a bottleneck on the freedom of engineers to design with. If RDRAM became the standard memory, I would put it any high production (and long time to market) designs I did. So would everybody else, and Rambus would collect royalties. Like I said, engineers would prefer to design systems that had no single source parts, but as long as you are going to include a big ASIC, you are going to have to have one nasty single source part. That does not give you the excuse to add more single source parts, by the way, it is just that particular single source part is unavoidable in a lot of modern designs. As long as you are going to include that ASIC, you might as well throw as much of the rest of your parts (single source or not) onto it as is economically viable to do. It is convenient if the embedded DRAM you use has a standard interface (so you can use standard simulation tools), but if you go around looking at various ASIC houses' embedded DRAM processes, you will little in the way of standardization. JEDEC just doesn't apply much inside a chip. -- Carl