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To: semiconeng who wrote (106993)	8/4/2000 10:08:32 AM
From: Scumbria	Respond to of 186894

Semicon, I am however, familiar with the Wafer Sort, and Final Test area, as well as Burn-In I am baffled by a methodology where microcode is updated after testing is complete. How can Intel be certain that a part runs at speed, if internal characteristics of the part are altered after test? Scumbria

To: semiconeng who wrote (106993)	8/4/2000 11:46:44 AM
From: pgerassi	Respond to of 186894

Dear Semiconeng: I am a device driver writer, long time software engineer, and been writing programs since before the i8080 showed up. The troubleshooting procedure by Kyle, is the way one determines if it is software or hardware. The fact that Prime95 crashes the system at 1133 but does not crash the same system (no change but FSB speed) at 850 leaves two possibilities, software or hardware. Benchmark software typically does not have timing loops or other such faults. When a benchmark fails, it fails at any speed. However, in the second test, Tbird at 1150 runs Prime95 fine. Thus speed can not be software related. Now, it must be hardware. Either the CPU can not handle 1133 or the motherboard handle an FSB 133. Since many motherboards were tried and all failed at 1133 but worked at 850, and those motherboards seemed to work with 1000 P3s, the highly probable culprit is the 1133 CPU. The margins on this CPU are far lower than most, less than half the voltage and delta Temp are left. It is more likely that the CPU shipped to Kyle is marginal (almost worked). Tom's may be even less capable. Whether this is a Q/C issue, a manufacturing problem of some kind, or some previously unknown problem, is yet to be determined. It is a small sample and many things can change from Intel acknowledging it is a big problem and delaying shipments to a simple test being added to Q/C to weed out these marginal CPUs. Time will tell. Pete