To: Scumbria who wrote (4696 ) 8/12/2000 2:46:37 AM From: milo_morai Read Replies (1) | Respond to of 275872 Scumbria is this SSE/SSE2 the same instructions as Intel's? Sound's like maybe from JC thread. Milo AMD's x86-64 Conference Call (AMD) Posted By Brian Neal Thursday, August 10, 2000 - 11:59:52 AM AMD just wrapped up a conference call discussing their x86-64 architecture. I have reproduced my notes here, and more importantly, responses to some of the questions we have been wondering about. For starters, TFP is in x86-64 as SSE/SSE2. Here are my notes, albeit sparse: Introduction First step in open release of documentation of 64-bit strategy Large memory system (addressing) Open as possible with specification Close collaboration with software vendors Open source community -- pre-alpha compilers ready Question and Answer TFP Implementation has essentially been displaced/replaced with extended SSE/SSE2 using 16 128-bit in 64-bit mode. There are no triadic instructions. Decided that a 16 GPR register file was the "sweet spot" for x86 performance. More than 16 registers introduces other problems. No comment about potential Compaq compilers for x86-64. AMD is working extensively with opensource developers in the GNU/Linux communities. This means we can almost certainly expect Linux on x86-64 and an optimized version of GCC. Unfortunately I did not record it as it was held over the phone. However, you can dial in and listen to the conference with the information below: Audio Replay Information A replay will be available beginning at 10:30 a.m. US PDT, August 10, and will run until 10:30 a.m. US PDT, August 17. To access audio replay: Dial (800) 633-8284/(858) 812-6440 Enter Reservation #16043498 *No password required* Source Ace's Milo