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To: NightOwl who wrote (50620)	8/21/2000 5:51:32 PM
From: Don Green	Read Replies (1) \| Respond to of 93625

Intel To Stay Mum On Chipset, Memory Plans At Forum Date: 08/21 15:16 EST Aug 21, 2000 (Tech Web - CMP via COMTEX) -- Intel Corp. may have little to say at this week's Intel Developers Forum when it comes to two areas of intense interest to the computing industry: the launch dates for its Pentium 4 and 64-bit Itanium processors and details of the company's chipset and memory roadmap. As it gears up for IDF, Intel is struggling to bring Pentium 4performance to the point where the company can disclose a launch date, according to observers. Separately, the company also appears to have been unable to bring its 64-bit Itanium processor to the promised introductory target speed of 800 MHz. At the Linux World show little more than a week ago, Intel was demonstrating a 500-MHz pre-production Itanium processor, while NEC Corp. was showing an Itanium-processor server that company executives said was well under the 800-MHz threshold. Moreover, Intel has confirmed that IDF will not include technical sessions discussing the company's desktop-PC chipset and memory roadmap. The decision not to disclose its upcoming plans in these areas will leave attendees waiting for official word from Intel as to how it hopes to address its future markets--information that is particularly sought after following the company's recent decision to include SDRAM memory in its Pentium 4 roadmap. On the processor front, Intel has been working feverishly to get its Pentium 4 up to 1.4-GHz to exceed the 1-GHz speed of its Pentium III MPUs, according to analysts. "Intel wants to make sure the next-generation processor outperforms Pentium 3, and will hold off the Pentium 4 launch until it does," said Nathan Brookwood, an analyst at InSight64, Saratoga, Calif. "The Intel Developer Forum will be a sure tipoff whether it has achieved this goal or not." The Pentium 4's performance is dictated by how well Intel handles its new 20-stage deep-pipeline architecture, said Bert McComas, an analyst at InQuest Research Inc., Gilbert, Ariz. "This compares with the 12-stage pipeline of Pentium 3. Any time you make a radical move to a much deeper pipeline, you can lose 20 percent to 30 percent in overall processor performance until you fine-tune the architecture," he said. The deeper pipeline increases PC-system speed greatly, allowing the Pentium 4 to reach a new speed-grade pinnacle. Jumping from a 12-stage to a 20-stage pipeline is a major challenge, an Intel spokesman noted. However, he said IDF technical sessions this week will detail how the company has fine-tuned the new processor architecture to overcome any loss of data throughput or performance. "It's not an issue," he said. Nevertheless, McComas told the recent Platform 2000 Conference in San Jose that the deeper pipeline was causing Pentium 4 to run at the same data rate as the 1-GHz Pentium III. Brookwood said the problems are solved by intensive fine-tuning of other areas of the processor operation, with Intel using its "trache cache" technique and refining the pre-fetch algorithms. Intel faced the same dilemma when it moved from Pentium Pro's five-stage pipeline to Pentium III, McComas said. "It didn't go as smoothly as Intel would've liked, but they solved the technical problem of going to a deeper pipeline with more stages." At the forum, observers will also see whether the 64-bit Itanium has reached its targeted speed of 800 MHz. As with Pentium 4, Intel isn't expected to set an Itanium launch date until it has met its announced targets. Analysts said it wasn't encouraging that a headlined show like the recent Linux World failed to bring out any 800-MHz devices. Intel's struggle to take the Itanium to higher speeds is an issue other 64-bit MPU chip makers are facing, according to Brookwood. "Sun Microsystems has had similar long delays trying to get its new UltraSparc III to market at 750 MHz. Compaq has also had delays bringing out its next-generation Alpha chip. Intel isn't alone," he said. Because of the company's dominant role in directing new PC architectures, much of the consumer computing industry will also be looking to learn more about Intel's plans as they relate to chipsets and memory. However, Intel late last week told EBN that Peter MacWilliams, an Intel fellow and director of platform architecture for the company, won't make his customary desktop-PC chipset and memory roadmap presentation at IDF. Calling Intel's decision "amazing," McComas said, "The whole world is waiting to hear what Intel is going to do, and apparently they intend to try to keep everyone in the dark. IDF is no better place for Intel to communicate with all segments of industry. I can't believe they wouldn't provide everyone with their chipset and memory roadmap which everyone is waiting for." While the company did not detail its decision, McComas said he suspected that Intel might have pushed out the discussion "because they are scrambling to put together a new cohesive roadmap after going to SDRAM memory, and probably double-data-rate [DDR] for Pentium 4 processors." As previously reported, McComas released confidential roadmap data showing that Intel plans to introduce a mainstream Pentium 4 called Northwood in the second quarter of 2001 using either an upgraded Tehama-E chipset supporting Direct Rambus DRAM or an alternative Brookdale chipset supporting PC133 SDRAM. McComas said he also expects Intel to allow third-party vendors to supply DDR chipsets for Penitum 4. In order to avoid legal problems with its partner, Rambus Inc., Intel is likely not to officially license third-party DDR chipset suppliers, but simply to "look the other way" when the core-logic devices are rolled out, McComas said. techweb.com