To: Bilow who wrote (50884 ) 8/23/2000 5:54:30 PM From: Zeev Hed Read Replies (2) | Respond to Carl, I am not going to repeat the same argument times after time, and reams of data (mind you without attached volume shipments) won't change the basic tenet (thus, an assumption, not knowledge in depth like yours, which has a tendency to cloud the broad strategic point of view) I have advanced on this thread a long time ago and repeated few times. That tenet is very simple, for whatever reason (right or wrong, and I presume you know better than the team within INTC that reached that decision), they decided that evolutionary acceleration of the communication between processors and peripherals will not advance the art rapidly enough, thus leaving INTC with fast processors (selling at very high premiums) that provide no visible advantages since their communication rate with DRAM serves as a performance bottle neck, they have gone as far as they thought prudent with on chip cache and needed to assure future availability of high speed com links. They may have not realized a priory that at relatively slower rates (let say under a Ghz), the advantages are minimal, but they sure want to make sure that later in the game the infrastructure is in place. They know better than anyone that without volume production accelerating going down the learning curve, the cost will be too high, thus their effort to "force on the industry" the bu$$ standard even if it is not the perfect solution at the mainstream of PC performance.
