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Politics : RAMTRONIAN's Cache Inn -- Ignore unavailable to you. Want to Upgrade?

To: NightOwl who wrote (7572)	8/27/2000 5:42:24 PM
From: NightOwl	Read Replies (1) \| Respond to of 14464

Can any body out there explain what this definition from the NEC License agreement means: 1.9 "Direct Write-Only Path" shall mean a write-only data path from outside the memory device to the DRAM, which write-only data path does not include the SRAM Memory except for any block of the SRAM Memory that is controlled in such a manner that data can only be written to such block from outside the memory device. It is crucial to understanding what the exception to the pass through license is intended to cover: 2.1.3 The rights granted under Section 2.1.1 do not extend to the use of the Licensed Products when the Licensed Products are controlled in such a manner that (a) a subportion of the DRAM can only be mapped to one block of the SRAM Memory throughout operation of the device, and (ii) data is written to that subportion of the DRAM through a Direct Write-Only Path. I am assuming that the exception this language describes is one which would bext serve a packet based memory system. That is that a system in which one or more blocks of the SRAM cache are devoted solely to holding the portion of the "packet" which identifies the remaining data that it contains, and perhaps where it is located in the rest of the DRAM core as well. If this is close to the actual concept, which it may have absolutely NO resemblance to(:8), then it sounds like a design reservation aimed at the communications markets highest and best use of the EDRAM IP. But I am not sure and would like to hear other thoughts on this. 0\|0