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Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: Scumbria who wrote (6839)	8/28/2000 9:21:03 PM
From: muzosi	Read Replies (1) \| Respond to of 275872

I think his point eventually becomes that for 1.5GHz CPU's, either the latency of the L1 must be increased, or the size of the cache must be reduced. Is this valid? It is valid I am curious whether this can't be worked around by using many smaller blocks of sram instead of one large block. I am sure this has occured to other people before but as very wide embedded dram blocks are possible, why not use this to get around this problem ? I am sure control logic will become larger. Is this the reason ? Muzo