To: NightOwl who wrote (51650 ) 8/29/2000 3:31:42 PM From: Bilow Read Replies (1) | Respond to of 93625 Hi NightOwl; Re: "can you suggest a reason for the absence of any effort by RMBS to have DRDRAM's core redesigned so as to take advantage of the performance enhancements of say: FCRAM, 1T-SRAM, CDRAM, or VC-*DRAM? " Sure. They're stupid, combined with a bit of NIH syndrome. Rambus never had the technical expertise required to specify DRAMs. It was (and remains) an ivory tower, theoretical, head in the clouds, intellectual, bumbling, forgetful scientist kind of operation rather than a practical DRAM engineering firm like Mosys (or Ramtron). Probably the best evidence for this is the fact that Intel and Rambus are currently thinking about reducing the number of banks from 32 to 4. This was an original mistake by Rambus which doomed their parts to having a 15% larger die size. That in itself prevented the technology from easily becoming the mainstream memory (which must be the cheapest), though the mistakes in the RSL area were also hard on the technology. Without Intel pushing it, RDRAM is obviously quite dead, and the fix to reduce the die penalty is years too late. The fact is that the die penalty has been known since years ago, but Intel and Rambus are only now addressing it. And the only reason they are is that the spectre of DDR compatible machines with cheaper memory, but with better latency and bandwidth specs is forcing them to. I would speculate that the Intel effort is only half hearted. They know that the technology is dead in the market place, but don't want to suddenly find themselves having to pay royalties on their RDRAM controllers. A PR is a cheap price for Intel to pay. Meanwhile Rambus continues on in its dreamlike waltz into the future. -- Carl